Field of the Invention
The invention is in the field of semiconductor technology and relates to a semiconductor component having first and second metal areas, which are both produced from a common first metal layer and are electrically insulated from one another. A second metal layer which is produced separately from the first metal layer and has a third metal area which is insulated from the first metal layer by the interposition of a dielectric layer is provided, where, together with the dielectric layer and the first metal area, it forms a memory element. A fourth metal area is provided in the second metal layer which, together with the second metal area, forms a contact area, and is used to make contact with the second metal layer. The invention also relates to a method for manufacturing the semiconductor component.
In semiconductor components, individual components or metal layers must be electrically connected to one another. Wiring planes, which are isolated from the individual components by insulation layers, are suitable for this purpose. In order to make contact with these components, the insulation layers have etched openings, which lead as far as the components or their contact points. Etching resist layers are normally used in order to prevent the layers located underneath from being etched through during the formation of the openings.
Such an etching resist layer on a metal layer is disclosed, for example, in U.S. Pat. No. 5,707,883. The etching resist layer, which in that case is composed of silicon nitrite, must, however, be removed in an insulation layer disposed above the metal layer, once the contact openings have been formed, since silicon nitrite is not electrically conductive. Additional process steps are therefore required for the production of the semiconductor component.
A semiconductor component of the type mentioned initially and in which a double-layer metal layer is provided as the contact to a contact hole located under the double-layer metal layer can be found in International Disclosure WO 96/17386 A1. The semiconductor component described there is, finally, seated on contact metallization so that no further contact-making is possible. However, this is fundamentally essential for higher integration layers in semiconductor components.